The invention relates to a clocked amplifier, more particularly, a differential and complementary input folded-cascode clocked amplifier having a rail-to-rail input common-mode voltage range, a small setup/hold time window, and high common-mode rejection.
Input/output (I/O) interfaces allow the entry of data into a computer and the extraction of data from a computer. Conventional high speed I/O interfaces include a receiving amplifier followed by a latch, the latch triggered by a clock to capture data. These conventional I/O interfaces are limited in their ability to latch data properly in part by their timing margin which is substantially reduced due to jitter of the input amplifier. Jitter, the variation of data with respect to a clock, is caused by noise from a power supply or an adjacently coupled data signal, etc. Input amplifier jitter is minimized by using a clock triggered amplifier in which the output stage of the amplifier itself is latched by the clock, as opposed to using a separate latch. A clock triggered amplifier is also useful in other applications including memory applications, etc.